A qualified B. Tech. with 12+ years of experience in the Semiconductor industry in VLSI Front-end domain (Design, Verification, Synthesis, Logical Equivalence Check, Power Intent check and STA).
Currently associated with Intel Technology India Pvt Ltd, Bangalore
Responsible for Micro architecture development and designing of Digital, Mixed signal IPs.
Defining unit level verification goals working with verification team.
Power intent specification and Low power Checks.
Working with Physical design team on timing and low power constraints.
Working in collaboration with the DFT and Product Engineering teams across sites.
Mentoring new team members in their job responsibilities.
A team player with strong problem solving and analytical skills.
Adept in organizing resources and establishing priorities.